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Articles
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From time to time, we publish articles on
different embedded and some non-embedded subjects. Most
articles are in PDF format. Adobe® Reader® or equivalent
is required to view the articles. Some articles are
accompanied with a source code project, which are also
available for download. The list of articles keeps
growing since we started SJJ Embedded Micro Solutions in
2004. To accommodate future articles, we have grouped
the past articles into their categories below for ease
of navigation. Please click on the tiles below for the
subject you are interested in.
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Nios® II and I2C Master Implementation on the on
the Intel® MAX® 10-10M08 Evaluation Kit - January 2023
We close out phase 1 of our FPGA articles with adding I2C
port to a Nios® II design. The Inter-Integrated Circuit (I2C
or I2C) provides chip-to-chip communication on a two-wire
bus. I2C has become very popular as more sensor chip
manufacturers provide more solutions with I2C as the
interface bus. For NIOS II, there is an I2C Master IP that
can be added to a design so you can connect various external
sensor and memory I2C devices, but there is a catch as some
extra circuity is needed to create the two wire interface.
The article demonstrates a solution to create the two wire
interface and communication with a I2C temperature sensor. |

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Nios® II and the Interval Timers’ Alarm and
Timestamp Functionality on the Intel® MAX® 10-10M08
Evaluation Kit - January 2023
Timing is everything. The Interval Time IP that comes with
Quartus not only provides the date and time for a Nios II
processor but also supports alarms and timestamp
functionality. The paper walks through a couple of
applications that test both. |

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Nios® II + UART Project on Intel® MAX® 10-10M08
Evaluation Kit - December 2022
Serial ports are the most common I/O in any MCU. Building on
the previous Intel® Max® 10 + Nios® II articles, this
article looks at adding a UART to a Nios® II
processor. |
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Nios® II ADC Implementation on Intel® MAX®
10-10M08 Evaluation Kit - November 2022
The previous article covered creating a design with the
Nios® II soft processor. This article adds the built ADC
peripheral to the Nios® II. Taking advantage of the hardware
on the Intel® MAX® 10-10M08 Evaluation Kit, an application
will be written to test the ADC input. As with the other
articles it is the little things that trip a designer up,
and this example is no exception. In this case, a work
around to a generated BSP issue is required. |

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A Simple Nios® II Implementation on Intel® MAX®
10-10M08 Evaluation Kit - November 2022
The Nios® II soft processor allows developers to create
their own MCU with peripherals and other glue logic in an
FPGA. The article looks at creating a Nios® II design using
the Intel® Quartus® development tools, and writing a C
program to test the design. |

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Implementing the ADC on Intel® MAX® 10-10M08
Evaluation Kit - October 2022
The paper explores the MAX 10's built in ADC and the ADC
Toolkit that comes with Intel® Quartus® Prime. |

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Getting Started with Intel® Quartus® Prime v21.0
and the Intel® MAX® 10-10M08 Evaluation Kit - October 2022
The first FGPA article discussed how to install the Intel®
Quartus® Prime tools. In this second FPGA article, we look
at creating a couple of circuits using VHDL and the
schematic editor. The Intel Max 10 -10M08 Evaluation Kit
will be used to test both designs. |

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Intel® Quartus® Prime Lite and
Nios® II SBT for Eclipse Installation Instructions -
October 2022
This article covers
the setup for Quartus® Prime Lite and Nios® II SBT for
Eclipse for two different development systems: Windows 10
and Ubuntu 18.0.4.
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The Current MCU Strategy for Azure - September
2022
With Windows CE long gone, Microsoft
has slowly developed a strategy to support 32-Bit MCUs and
connecting these devices to Azure.
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Article Archive
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